Power consumption and the speed are the major factors of concern for designing a chip along with the leakage power. Lower operating voltage will lower the stability of SRAM cell resulting in lower value of static noise margin. As the IC process technology scales, the oxide thickness and operating voltage continues to decrease. Working on low supply voltage and leakage energy has become main concern as the power consumption can be reduced significantly. Thus the demand for low size and low power memory has increased. Hence it is very important to have low power SRAMs.įrom the last more than five decades we are scaling down the size of the CMOS devices to make the devices portable and compact in size and to get better performance in terms of access time, power dissipation, delay etc. On chip SRAMs (Static Random Access Memory) determine the power dissipation of SoCs (System on Chips) in addition to its speed of operation. The need for low power integrated circuits is well known because of their extensive use in the electronic portable equipments.
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